1. Field of the Invention
The present invention relates to switching power supply circuitry. Specifically, the invention relates to a switching controller or regulator (implemented as an integrated circuit) for use in a DC-to-DC converter in which a power switch switches on in response to "on" signals from the controller or regulator chip (and in which the power switch switches off in response to "off" signals from the controller or regulator chip), where the controller or regulator chip is operable in any selected one of at least two modes, including a mode in which the chip generates the "on" signals in response to internally generated clock pulses, and another mode in which the chip generates the "on" signals in response to pulses supplied from external circuitry.
2. Description of the Related Art
FIG. 1 is a conventional DC-to-DC converter which includes current mode switching controller 1 which is implemented as an integrated circuit, and boost converter circuitry external to controller chip 1. The boost converter circuitry comprises NMOS transistor N1 (which functions as a power switch), inductor L, current sense resistor R.sub.s, Schottky diode D, capacitor C.sub.out, feedback resistor divider R.sub.F1, and R.sub.F2, compensation resistor R.sub.c, and compensation capacitor C.sub.c, connected as shown. The FIG. 1 converter produces a regulated DC output voltage V.sub.out across load R.sub.o, in response to input DC voltage V.sub.in.
Controller chip 1 includes oscillator 2 (having a first output and a second output), comparator 8, driver 6 which produces an output potential V.sub.DR at pad 12 (to which the gate of switch N1 is coupled), latch 4 (having "set" terminal coupled to oscillator 2, "reset" terminal coupled to the output of comparator 8, and an output coupled to the input of driver 6), error amplifier 10 (having a non-inverting input maintained at reference potential V.sub.ref), and circuit 9 (having a first input coupled to the second output of oscillator 2, a second input coupled to pad 13, and an output coupled to the inverting input of comparator 8).
Pad 13 is at potential V.sub.c, which is determined by the output of error amplifier 10 (in turn determined by the difference between the instantaneous potential at Node A and the reference potential V.sub.ref) and the values of external resistor R.sub.c and capacitor C.sub.c. Reference potential V.sub.ref is set (in a well known manner) by circuitry within chip 1, and is normally not varied during use of the circuit. In order to set the regulated level of the output voltage V.sub.out, resistors R.sub.F1 and R.sub.F2 with the appropriate resistance ratio R.sub.F1 /R.sub.F2 are employed.
Oscillator 2 asserts a clock pulse train (having fixed frequency and waveform as indicated) at its first output, and each positive-going leading pulse edge of this pulse train sets latch 4. Each time latch 4 is set, a control signal asserted by driver 6 (the potential V.sub.DR asserted by driver 6 to the gate of transistor N1) causes transistor N1 to turn on, which in turn causes current I.sub.L from the source of N1 to increase in ramped fashion. Although transistor N1 turns on at times in phase with the periodic clock pulse train, it turns off at times (which depend on the relation between reference potential R.sub.ref and the instantaneous potential at Node A) that have phase that is independent relative to that of the pulses of the periodic clock pulse train.
Oscillator 2 asserts ramped voltage V.sub.osc (which periodically increases at a fixed ramp rate and then decreases with a waveform as indicated) at its second output. Circuit 9 asserts the potential V.sub.c -V.sub.osc to the inverting input of comparator 8. Assertion of the potential V.sub.c -V.sub.osc (rather than V.sub.c) to comparator 8 is necessary for stability.
The non-inverting input of comparator 8 is at the feedback potential V.sub.s =I.sub.L R.sub.s, which increases in ramped fashion in response to each "set" of latch 4 by oscillator 2. When V.sub.s =V.sub.c -V.sub.osc (after latch 4 has been set), the output of comparator 8 resets latch 4, which in turn causes the potential V.sub.DR asserted by driver 6 to the gate of transistor N1 to turn off transistor N1. Thus, by the described use of both signals output from oscillator 2 and feedback asserted to error amplifier 10 from Node A, controller chip 1 switches transistor N1 on and off with timing that regulates the output potential V.sub.out of the FIG. 1 circuit.
Other conventional DC-to-DC converters which include a current mode switching controller implemented as an integrated circuit (as does the FIG. 1 circuit) also include circuitry (e.g., buck converter circuitry) other than boost converter circuitry that is external to the controller chip. Typical buck controller circuitry differs from the boost converter circuitry of FIG. 1 in that it includes an NMOS transistor (replacing NMOS transistor N1 of FIG. 1) whose source is coupled through an inductor to the output node (whereas in FIG. 1 the drain of transistor N1 is coupled through diode D to the output node, and inductor L is coupled between the input potential V.sub.in and the source of N1), a Schottky diode connected between ground and the source of N1 (replacing diode D of FIG. 1), a sense resistor connected between the input potential V.sub.in and the drain of the transistor (rather than between ground and the source of N1 as in FIG. 1), and a boost capacitor coupled between the controller chip and the source of the transistor.
We shall use the expression "switching regulator" chip herein to denote a circuit which performs the functions of a "switching controller" chip but which also includes an on-board power switch. In contrast, a "switching controller" chip does not include an on-board power switch and must be used with an external power switch (as controller chip 1 of FIG. 1 is used with an NMOS transistor N1 which is external to chip 1). Switching controller chip 1 of FIG. 1 is an example of a "current mode" switching controller chip. There are other types of switching controller and regulator chips (such as voltage mode switching controllers) which can be implemented in accordance with the invention, some of which work without an external sense resistor while others require an external sense resistor.
Some conventional DC-to-DC converters differ from the conventional circuit of FIG. 1 in that they include a current mode switching regulator chip in place of a current mode switching controller chip. The current mode switching regulator chip in each such converter does not include a sense resistor, and instead is used with an external sense resistor (such as resistor R.sub.s of FIG. 1). For example, one such converter employs a current mode switching regulator chip that differs from chip 1 of FIG. 1 in that counterparts to NMOS transistor N1 and resistors R.sub.f1 and R.sub.f2 are implemented on-board the regulator chip. In this type of converter, the circuitry external to the regulator chip does not include an external power switch, but it does include an external sense resistor (e.g., an external sense resistor identical to resistor R.sub.s of FIG. 1).
It would be desirable to implement improved versions of conventional switching regulator (or controller) chips, in which the improved controller or regulator chip is operable in any selected one of at least two modes, including an oscillator mode in which the improved chip generates switch control signals (for turning on a power switch) in response to internally generated clock pulses, and a sync mode in which the chip generates the switch control signals in response to pulses supplied from external circuitry. For example, the pulses supplied from external circuitry could occur periodically at a user-specified frequency, or they could be indicative of a user-specified synchronization waveform. It would also be desirable for such an improved controller or regulator chip to enter a shutdown mode (in which it consumes little or no power, and does not generate switch control signals) in response to an externally supplied control signal. However, until the present invention it had not been known how to implement such an improved controller (regulator) chip so that only a single external pin is required to send control signals to the chip to cause it to enter either of the oscillator and sync modes (or any of the oscillator, sync, and shutdown modes).